Why Hacker News recommends it
4 comments from 2 distinct recommending readers, between 2022 and 2023.
- Recommends
The Apple-specific instructions in M-series have been generally shown to have less impact on overall performance than initially expected: twitter.com/never_released/status/15341…...
Why Steam Deck Is One of the Most Significant PC Gaming Moments in YearsRead the thread - Recommends
It turns out Rosetta2 does not rely on special M1 hardware memory ordering at all: twitter.com/never_released/status/15341…... twitter.com/marcan42/status/15340323691… The baseline for translation is qemu-user, but other pure-software emulators like FEX-emu and Box86/Box64 can perform this translation significantly faster. So I think there's just ordinary performance engineering to close the gap.
Welcome to the M1 Windows projectRead the thread - Cites it
This ("TSO") is actually an ARM standard however its only very latest ARM (v8.4-v8.7) and not many other CPU implementation currently. AWS Graviton 3 and maybe very latest phone SoCs if I understand correctly. news.ycombinator.com/item?id=31664688 twitter.com/marcan42/status/15340536251… twitter.com/never_released/status/15341…...
Binary Translators for Weak Memory Model ArchitecturesRead the thread - Cites it
Hmm, wasn't aware that someone found a TSO sysctl that actually does something. The rest of my opinion is based off of these three Twitter threads: twitter.com/marcan42/status/15340536251… twitter.com/never_released/status/15341…... twitter.com/marcan42/status/15341567882…
The Intel 80376 – A legacy-free i386 with a twist (2010)Read the thread